IBM System/23 Datamaster: Difference between revisions
Added interrupts |
Detailed test 05 |
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! Test !! Description !! Notes | ! Test !! Description !! Notes | ||
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| 00/FF (uninitialized) || Data bus test (undocumented) || writes and reads to port 0x4C (8255 managing keyboard, port A) | | 00/FF (uninitialized) || Data bus test (undocumented) || writes and reads to port 0x4C (8255 managing keyboard, port A). | ||
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| 01 || CPU || 8085 self-test | | 01 || CPU || 8085 self-test. | ||
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| 02 || First unpaged ROS ROM || This is the ROM at 0000h | | 02 || First unpaged ROS ROM || This is the ROM at 0000h. | ||
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| 03 || Reserved || Unused. Tests pass directly from 02 to 04. | | 03 || Reserved || Unused. Tests pass directly from 02 to 04. | ||
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| 04 || RAM || Test for the first unpaged 16KB. Lecture of register 0x2e | | 04 || RAM || Test for the first unpaged 16KB. Lecture of register 0x2e. | ||
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| 05-07 || CRTC || Initialization and test; any error in this step or earlier requires a probe | | 05 || CRTC, DMA || Interrupt test; initialization of 8275, 8257; light pen test. | ||
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| 06-07 || CRTC || Initialization and test; any error in this step or earlier requires a probe | |||
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| 08 || Page registers || For CPU access, ROM only | | 08 || Page registers || For CPU access, ROM only | ||