IBM System/23 Datamaster: Difference between revisions

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Pagination is achieved thanks to four registers. From those, two determine where the CPU shall access its resources while the other two are reserved to the same purpose but only for DMA address generation. The widths of each register is four bits, therefore allowing the maximum of sixteen pages.
 
Video memory seems to be pagedplaced at address 8000h (to be confirmed).
 
== Units in collection ==