IBM System/23 Datamaster: Difference between revisions

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[[File:IBM System-23 Simplified memory map.png|frameless|right|alt=IBM System/23 Simplified memory map|IBM System/23 Simplified memory map]]
The IBM System/23 divides its 64KB of addressable space in four segments of 16KB each. All even segments are fixed into the memory map but all the odds are paged and can support up to 16 pages each. The first half portion of the map corresponds to ROM while the last half of it is mapped to RAM<ref>SY34-0171-0 IBM 5322 Computer Service Manual, page 78</ref>.
 
Pagination is achieved thanks to four registers. From those, two determineone wheredetermines the CPUROS shallpage accessbeing itsread, resourcesanother whileis used by the DMA mechanism and the other two are reservedused toby the sameCPU purposeaccess butto onlyRAM (for DMAreading and addresswriting, generationrespectively). The widths of each register is four bits, therefore allowing the maximum of sixteen pages.
 
Video memory seems to be placed at address 8000h (to be confirmed).