IBM System/23 Datamaster: Difference between revisions
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The IBM System/23 divides its 64KB of addressable space in four segments of 16KB each. All even segments are fixed into the memory map but all the odds are paged and can support up to 16 pages each. The first half portion of the map corresponds to ROM while the last half of it is mapped to RAM<ref>SY34-0171-0 IBM 5322 Computer Service Manual, page 78</ref>.
Pagination is achieved thanks to four registers mapped 20h-23h at the I/O space. From those, one determines the ROS page being read, another is used by the DMA mechanism and the other two are used by the CPU access to RAM (for reading and writing, respectively). The widths of each register is four bits, therefore allowing the maximum of sixteen pages. From those, the first eight are expected to be in the board while the remaining are expected to be provided by each expansion card added.
Video memory seems to be placed at address 8000h (to be confirmed).
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